With ever increasing logic densities and the inevitable migration of functionality from the analog domain, the challenges associated with today's logic designs are reaching unprecedented levels. Chip design (ASIC, FPGA and SoC) is a powerful solution used to implement complex algorithms and functions directly in high performance hardware. They can also act as the glue which interfaces processors to high speed peripherals. These challenges include sophisticated simulation requirements, complicated development tools, involved timing analyses, algorithm implementation, and extensive debugging and test development. Profit from our extensive experience in chip design. Whether it is ASIC, FPGA or SoC with up to millions of different gates or other solutions for integrated switching (IC), HDL design and digital technology on the basis Altera, Xilinx, Lattice and Actel –First-Time-Right (FTR) has become a reality at CYBERNETICS International.

Our proven process and development techniques:

• VHDL, Verilog, SystemVerilog, SystemC
• Chip manufacturer: Altera, Xilinx, Lattice and Actel
• Tools: ModelSim (Mentor), Riviera (Aldec)
• Module and system simulation
• Functional and timing simulation
• HW/SW combi-verification (CPU model, seamless)
• Assertion-based verification (PSL)
• Regression tests
• Thermal examinations
• Synthesis (specific to the provider): mentor (Precision), synopsis (Synplicity)
• Place & route
• Version management (ClearCase, CVS, SVN)